Application Notes

Review of GSFC NASA Advisory NA-GSFC-2005-04

This report reviews the issues and recommendations in GSFC NASA Advisory NA-GSFC-2005-04 titled, “Application of Hitachi 1-Mbit Die Based EEPROM Technology to SpaceApplications”. This report begins with information on the Maxwell Technologies product line, the EEPROM technology and testing of EEPROMs. Following the general EEPROM information, Maxwell Technologies provides a response to each point of the GSFC Advisory. The report is finished with Maxwell Technologies’ conclusion.

This document illustrates the calculation of current consumption of Maxwell Technologies SDRAM products

This document describes the hardware and programming methology used to program a 79C0408 EEPROM.

This document describes the hardware and programming methology used to program a 27C1512T one time programmable EPROM.

This document describes the architecture and features of Maxwell Technologies Synchronous DRAM (SDRAM). A brief discussion of a conventional Dynamic Random Access Memory (DRAM) provides background information on the evolution of the industry standard architecture to the SDRAM.

Outlines additions made to the electrical characteristics of the 79C0832 datasheet.

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Outlines additions made to the electrical characteristics of the 79LV0832 datasheet.

Click to View/Download - Zip file containing multiple PDF documents

Heterojunction Bipolar Transistor (HBT) die technology is not found in any of Maxwell's standard products.

Maxwell has just become aware of a problem with the Atmel 62706F FIFO. This error was identified by the European Space Agency as shown in the attached ESA Alert, EA-2002-EEE-02-A. The error occurs when the next to last word in the FIFO is being read and a write to the FIFO occurs too close to that read. If the leading edge of the write occurs within 11 ns of the trailing edge of the read then the last word in the FIFO can be lost.

Over the last several years our customers have identified a few instances in which a single bit error has occurred in a memory. Typically, this error is observed as a single memory location changing value from one read to another read cycle. Maxwell collected information on these errors and provided this response.

Temporarily Unavailable

Maxwell Technologies has created a Bit Map and Memory Map for the 1Mb EEPROM die-HCN58C1001C30. The Bit Map shows a physical representation of the X & Y coordinates for each 128kbit memory block within the die. The Memory Map, on the other hand, shows a graphical representation of how the memory banks are configured for the whole 1Mbit of memory. Both the Bit Map and Memory Map are included in this report.

Temporarily Unavailable

Over the last several months several design applications questions have been asked regarding the Hitachi EEPROM. These questions have been to both clarify the datasheet specifications as well as obtain additional information not contained in the datasheet. This application note documents the answers that Maxwell has received from Hitachi.