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Latchup Protection Technology™ (LPT) Overview

Maxwell Technologies Microelectronics has developed LPT to protect an IC from the effects of a single event latchup. The LPT circuitry protects ICs, based on the following methodology:

  • Limits SEL current
  • Prevents burnout and/or catastrophic failure
  • Protects any/all inputs or outputs that can be damaged during an SEL
  • Provides automatic shutdown of the IC power supply
  • Provides automatic power supply "re-application" after shutdown

LPT technology devices are substantially more usable in space applications than non-LPT technology devices. Should an SEL occur, an LPT protected device will experience a brief "off" time, while avoiding potentially fatal hazards such as burnout or catastrophic failure. LPT circuitry has been developed and validated for a 16-bit analog to digital converter, the 7805LPRP, which is manufactured as a MCM and is being offering in both a 28 pin flat package (FP) or a 28 pin dual inline package (DIP/DIL), and production units are available. Maxwell is now accepting orders to develop customer-specific, LPT-protected ICs.

Many commercially available advanced technology CMOS and bipolar integrated circuits are latchup susceptible to single event effects caused by heavy ions or protons from cosmic rays or solar flares making them unsuitable for satellite applications.

Remanufacturing the integrated circuits on an inherently SEL immune process has been an expensive and technically difficult option, as is the alternate option of incorporating latchup protection and recovery circuitry in the spacecraft system electronics. Maxwell Technologies has developed several different circuits which provide protection and recovery of integrated circuits known to exhibit single event induced latchup. These circuits are integrated within the same package as the susceptible integrated circuit using MCM and modern packaging technology, resulting in a device level solution providing minimum cost and minimum impact on the system. The LPT circuit was designed to provide the following features to protect and recover the susceptible integrated circuit device:

  • Provide current limiting to the device
  • Detect the increase in current during the SEL event above a preset threshold
  • Force a shutdown of the protected device when the threshold is exceeded
  • Hold the device in the shut down mode for a preset time interval
  • Return the device supply voltage to its original operating level

The LPT circuitry has the potential to be applied to a wide variety of susceptible devices. The specific implementation details such as current latchup protection threshold and supply off time are determined by characterization of the susceptible devices at a heavy ion facility. The LPT device impacts a satellite component system by converting a Single Event Latchup (SEL) into a recoverable event. Using mission specific or orbit radiation data, recoverable event rates can be calculated. The rate and number of these recoverable events is dependent on the fluence, energy, and species of radiation encountered by the device during the particular mission.

Charge collection due to a single particle in sensitive circuit nodes (such as the drain of an "off" N- or P-channel transistor) can change the state of circuit memory elements causing a Single Event Upset (SEU). If a particle with sufficient LET strikes the drain of one of the "off" transistors in the memory cell, the cell can change state. The current pulse in the reverse-biased junction (resulting from the collection of the charge generated by the particle) will cause a perturbation in the output voltage that is fed back to the input of the other inverter, changing the logic state stored.